New College Grad - Design Engineer, HBM DFT
Core
Design for Test (DFT) engineering for next-generation High Bandwidth Memory (HBM) products, focusing on testability, quality, and silicon bring-up.
Role type
Entry-level IC design engineer (DFT)
Builds
High Bandwidth Memory (HBM) chips
Domain
Semiconductor / Memory / Digital Design
Deliverable
production ML models | product features
Required skills
Digital design fundamentals, SystemVerilog/Verilog, scan insertion, hierarchical DFT integration, ATPG readiness, MBIST validation, RTL design, debug activities
Preferred skills
DFT concepts (scan, MBIST, boundary scan), test access mechanisms, gate-level simulation, AI-enabled tools in engineering workflows
Technologies
SystemVerilog, Verilog, IJTAG, P1500
Responsibilities
Assist with scan insertion and integration of DFT features, Support hierarchical DFT integration for multi-channel HBM structures, Run and debug DFT checks (scan DRC, chain integrity), Support simulation and debug activities (ATPG, test-mode sequencing), Collaborate with RTL, DV, PD, and Product/Test Engineering teams
Seniority
Entry-level, 0-3 years experience
