Senior Staff DFT MBIST Engineer
Core
Defining, specifying, and implementing DFX solutions for AI Accelerators SoCs using Digital In-Memory Computing and heterogeneous chiplet architectures.
Role type
Senior Staff DFT MBIST Engineer
Builds
AI Accelerators SoCs for data centers and large language models
Domain
Semiconductor / AI Hardware / Digital In-Memory Computing
Deliverable
production ML models
Required skills
ATPG (SAF, TDF), MBIST, Memory Repair, In-System Test (IST), Boundary Scan, DFT RTL generation, IEEE1149.1/1500/1687 standards, ATPG coverage analysis, ATE pattern delivery, diagnostic tool generation, hardware description languages (Verilog/System Verilog/VHDL), scripting (Perl/Python/TCL/C)
Preferred skills
RTL-Scan insertion, design rule fixing, timing feedback for STA, Spyglass LINT/DFT/Fishtail integration
Technologies
Spyglass LINT, Spyglass DFT, Fishtail, ATE
Responsibilities
Partitioning for ATPG and hierarchical approaches; ATPG compression and serialization; Memory BIST implementation including repair and IST; Boundary Scan and DFT mode constraint writing; DFT RTL generation and QC integration; ATPG and MBIST verification with timing corner simulations; Diagnostic tool generation for ATE bring-up
Seniority
Senior Staff, hands-on IC
