SR ENGINEER, Design Verification
Core
Design verification for pre-silicon full chip designs, focusing on DRAM and emerging memory architectures.
Role type
Senior IC design verification engineer (memory)
Builds
Pre-silicon verification environments, test benches, and test vectors for DRAM and emerging memory products.
Domain
Semiconductor / Memory / DRAM / Emerging Memory
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Simulation and debugging of pre-silicon full chip designs, Test case and stimulus development, Test bench and test vector creation, Regression analysis for coverage, Verification methodology development, Gate level circuit analysis, CMOS circuit design understanding, SPICE simulation, Verilog simulation
Preferred skills
Leading edge verification techniques, International collaboration, AI tool usage for verification activities
Technologies
SPICE, Verilog
Responsibilities
Simulate, analyze, and debug pre-silicon full chip designs; Develop test cases and stimulus to increase functional coverage; Develop and maintain test benches and test vectors; Co-work on developing new verification flows; Participate in developing verification methodology and environments.
Seniority
Senior, hands-on IC
