Principal/Staff Engineer Engineer, APTD CEM - Advanced Packaging Die Level Technology Engineering
Core
Developing and enabling deployment of assembly processes for advanced packaging technologies to meet performance, cost, manufacturability, quality, reliability, and schedule requirements for high-performance memory products.
Role type
Principal/Staff Engineer, Advanced Packaging Die Level Technology Engineering
Builds
High bandwidth memory (HBM) products and advanced packaging solutions for AI and supercomputing applications
Domain
Semiconductor manufacturing, Advanced Packaging, Memory Technology
Deliverable
production ML models | product features | dashboards & analysis | infrastructure
Required skills
Semiconductor process development, Equipment evaluation, Wafer bonding, Die stacking, Process modeling, Statistical analysis, Root cause analysis, Yield improvement, Process flow management, Data analytics
Preferred skills
Python, R, SQL, Visual Basic, E3, FDC, RMS
Technologies
Python, R, SQL, Visual Basic, E3, FDC, RMS
Responsibilities
Develop and optimize assembly processes for advanced packaging technologies including wafer-level packaging and die stacking; Evaluate and promote new equipment and materials to enhance process capabilities; Ensure defense coverage through process, measurement, inspection, and testing; Integrate AI-assisted tools and insights into daily work to improve efficiency and quality; Coordinate with cross-functional teams to integrate manufacturing processes for optimal performance and quality control.
Seniority
Principal/Staff, hands-on IC
