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Advance Packaging Process Development Engineer

Taichung - Fab 16, Taiwan💼 Full-time🗓 2026-07-17 → 2026-07-31

Core

Developing, configuring, and optimizing package assembly processes (front end, bonding, back end) for memory product ramp-up, including side-by-side certification with manufacturing teams.

Role type

Junior IC process development engineer (semiconductor packaging)

Builds

Memory products (DRAM, NAND, NOR) and innovative package technologies (HBM, TSV, Bumping)

Domain

Semiconductor manufacturing and packaging

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Process development, data interpretation, measurement analysis, change control board (CCB) management, process capability assessment, integration experience in package assembly and wafer level processes

Preferred skills

Experience with High Bandwidth Memory (HBM) integration, TCB (Thermal Compression Bonding), CMP (Chemical Mechanical Polish), Ball Mount, Photo, PVD, CVD, wafer level molding, Flip Chip, Underfill, Hybrid bond, Glass carrier bond/de-bond

Technologies

TCB, CMP, Ball Mount, Photo, PVD, CVD, wafer level molding, Flip Chip, Underfill, Hybrid bond, Glass carrier

Responsibilities

Develop and optimize package assembly processes, assess processes by knowledge and skills, take measurements and interpret data, run, test, and upgrade systems and processes, approve material and equipment changes in CCB

Seniority

Junior, fresh graduate to <2 years experience

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