Design Engineer, Coherent High Speed Interconnect
Core
Design and optimize high-speed coherent interconnects (NVLINK-C2C) for mobile SoCs and GPUs to enable coherent interconnection of NVIDIA GPUs, DPUs, and CPUs.
Role type
Senior IC design engineer (high-speed interconnects)
Builds
NVLINK-C2C chiplet interconnect technology for NVIDIA GPUs, DPUs, and CPUs
Domain
Semiconductor / High-speed digital interconnects
Deliverable
production ML models | product features
Required skills
Electrical Engineering or Computer Engineering degree, RTL design, performance analysis, power optimization, Verilog or System Verilog, knowledge of PCIE/CXL/AXI/CHI protocols
Preferred skills
Master or PhD degree, mentoring junior engineers
Technologies
NVLINK-C2C, Verilog, System Verilog, PCIE, CXL, AXI, CHI
Responsibilities
Work on architecture and design of high-speed coherent interconnects, Collaborate with architects, external partners, software engineers, and circuit designers, Optimize design based on features, requirements, and system limitations
Seniority
Senior, hands-on IC
