Staff SOC Performance Architect
Core
Develop cycle-accurate timing and performance models for coherent and non-coherent interconnects to shape the next generation of high-performance Arm System IP. (via careerplan.io/jobs/100461573792-staff-soc-performance-architect-at-arm)
Role type
Staff SoC Performance Architect (IC)
Builds
High-performance interconnect IP for Arm Cortex processors and Arm Mali multimedia IP
Domain
Semiconductor / Computer Architecture / SoC Design
Required skills
SoC performance modeling, RTL design, cycle-accurate performance modeling, microarchitecture evaluation, C++ (large-scale), SystemC TLM, Python scripting
Preferred skills
Interconnect microarchitecture knowledge, PCIe and CHI protocols, realistic workload optimization, performance verification methodologies
Technologies
SystemC TLM, Python, C++, Arm Cortex, Arm Mali
Responsibilities
Collaborate with micro-architects, RTL, and validation engineers to develop cycle-accurate timing and performance models; Drive new feature development and evaluate architectural trade-offs; Build high-quality, well-correlated performance models for internal and customer use; Design performance test suites and identify bottlenecks; Partner with internal teams and external customers to deliver insights for high-performing systems.
Seniority
Staff, hands-on IC
