DFT Engineer - Hardware
Core
Design-for-Test (DFT) architecture, verification, and post-silicon validation for complex semiconductor chips from RTL to gate level.
Role type
DFT Engineer
Builds
Semiconductor chips with integrated DFT features
Domain
Semiconductor / Hardware Design
Required skills
Static timing analysis, ASIC/Logic design flow, HDL, Digital logic design, RTL verification, Gate level verification, BIST architecture, JTAG/IEEE1149.1/IEEE1500, Scan ATPG, Compression techniques, Memory test, Scripting (Perl/Python)
Responsibilities
End-to-end DFT from RTL design to gate level scan insertion and verification, Verification and silicon bringup of Scan ATPG and DFT features, Develop and deploy DFT methodologies for next generation products, Incorporate DFT features into chips with multi-functional teams
Seniority
Mid-level, hands-on IC
