Senior DFT ATPG Engineer
Core
Developing next-generation DFT architecture, verification, and post-silicon validation flows for advanced semiconductor chips.
Role type
Senior IC DFT ATPG Engineer
Builds
Production test flows and automation for semiconductor chips
Domain
Semiconductor / Hardware Design
Deliverable
production ML models | product features | infrastructure
Required skills
DFT/ATPG flow implementation, ATPG tool ownership (arch to diagnosis), automation flow development, Mentor TestKompress retargeting, scripting (TCL, Python, Unix shell), ATE and silicon bring-up experience
Preferred skills
Scan/BIST/on-chip scan compression, fault models, fault simulation, ATE experience
Technologies
Mentor TestKompress, TCL, Python, Unix shell
Responsibilities
Lead state-of-the-art DFT/ATPG flow implementation, own ATPG projects end-to-end from architecture to post-silicon diagnosis, invent and maintain automation flows for short test time
Seniority
Senior, hands-on IC
