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Senior Mixed Signal Design Validation Engineer

US, CA, Santa Clara💼 Full-time💰 $168,000–$168,000🗓 2026-02-27 → 2026-09-25

Core

Lead bring-up, characterization, and validation of high-speed mixed-signal memory interfaces (LPDDR, GDDR, HBM) for NVIDIA GPUs and AI platforms.

Role type

Senior IC mixed-signal design validation engineer

Builds

High-speed memory interfaces and I/O systems for GPUs and AI computing platforms

Domain

Semiconductor / High-speed memory technologies

Deliverable

production ML models | product features

Required skills

Silicon bring-up and debugging, Mixed-signal circuit analysis, Signal integrity (SI) and Power integrity (PI) analysis, Lab instrumentation (oscilloscopes, logic analyzers, TDR, BER testers), Python/C scripting, Memory system specifications

Preferred skills

Measurement theory, High-speed transceiver performance expertise

Technologies

LPDDR, GDDR, HBM, Python, C, Git, JMP

Responsibilities

Create validation test plans and scripts for DDR I/O, Characterize analog/digital/mixed-signal blocks under PVT conditions, Drive system-level validation for memory interfaces, Debug unexpected bugs and resolve circuit weaknesses, Validate silicon performance and margins, Develop tools to enhance electrical characterization and chip bring-up, Mentor new engineers on validation practices

Seniority

Senior, hands-on IC

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