Post-Silicon Validation Engineer
Core
Bringing up, validating, and characterizing ASICs from first silicon through production ramp for AI/ML accelerator hardware.
Role type
Post-Silicon Validation Engineer (ASIC)
Builds
AI/ML inference chips and accelerator components
Domain
Semiconductor hardware / AI infrastructure
Deliverable
production ML models | infrastructure
Required skills
ASIC bring-up and debug, RTL/firmware/system-level debugging, C/Python scripting, lab instrumentation (oscilloscopes, analyzers, BERTs), stress testing and corner case analysis, validation strategy definition, yield issue analysis
Preferred skills
Low-speed peripheral interfaces (I2C, SPI, UART, JTAG), high-speed protocols (PCIe, Ethernet), memory subsystems (HBM, DDR), performance and thermal characterization, AI/ML model profiling
Technologies
C, Python, JTAG, PCIe, Ethernet, HBM, DDR, BERTs, pattern generators
Responsibilities
Drive early bring-up of first silicon including boot and initialization; Perform deep-dive debug of silicon issues across RTL, firmware, and system levels; Validate and characterize custom IP blocks and accelerator components; Execute functional and performance validation of compute units; Conduct IP-level and full-chip stress testing; Develop and extend post-silicon validation infrastructure and automation; Utilize lab instrumentation for detailed signal and system characterization; Provide feedback on test escapes and silicon errata to influence revisions
Seniority
Senior, hands-on IC
