Senior Post-Silicon DDR Characterization Engineer
Core
Validate and characterize next-generation Arm SoCs, focusing on DDR/LPDDR memory subsystems across PVT conditions.
Role type
Senior IC post-silicon characterization engineer
Builds
Silicon validation data and system-level stress workloads for Arm SoCs
Domain
Semiconductor / Memory Subsystems
Required skills
DDR/LPDDR architecture knowledge, C/C++ programming, Python scripting, silicon debugging, PVT analysis, system-level test planning
Preferred skills
DDR PHY characterization, memory-controller interaction analysis, LPDDR4/4X/5/5X expertise, firmware development, low-level C programming
Technologies
Linux, Bare-Metal SW, Logic Analyzers, Oscilloscopes, Debuggers, Python, C/C++, Arm Assembly
Responsibilities
Develop system-level stress workloads on Linux and Bare-Metal environments, collaborate with validation teams to characterize silicon, debug and resolve system issues, develop and implement test plans for silicon characterization
Seniority
Senior, hands-on IC (via careerplan.io/jobs/100509410672-senior-post-silicon-ddr-characterization-engineer-at-arm)
