Principal Engineer. HBM SIPI
Core
Senior SI/PI technical authority shaping system-level decisions for next-generation HBM development, impacting performance, reliability, and scalability across product generations.
Role type
Principal Engineer (Signal Integrity/Power Integrity)
Builds
High Bandwidth Memory (HBM) solutions for AI and ML platforms (via careerplan.io/jobs/JR111361-principal-engineer-hbm-sipi-at-micron)
Domain
Semiconductor / Advanced Packaging / High-Speed Interfaces
Deliverable
production ML models
Required skills
Signal integrity modeling, Power integrity modeling, Electromagnetics, Transmission line theory, I/O design, EDA tools (ANSYS, Synopsys, Cadence, Keysight), 2.5D/3D interposer design, High-bandwidth interface protocols (HBM, DDR, SERDES, UCIe), System-level sign-off, Scripting (TCL, Python)
Preferred skills
10+ years SI/PDN experience, Direct ownership of production silicon sign-off
Technologies
ANSYS, Synopsys, Cadence, Keysight, TCL, Python
Responsibilities
Lead signal integrity channel analysis for 2.5D and 3D silicon interposers, Define and drive power delivery architecture and impedance targets, Perform electromagnetic extraction and modeling across PCB/package/interposer, Establish SI/PI standards and sign-off criteria, Provide technical direction in ambiguous design environments
Seniority
Principal, hands-on IC with strategic influence
