PCB Layout Engineer (Taiwan)
Core
Design and optimize high-performance PCBs for AI inference systems, focusing on 100G signaling, power distribution, and HDI stack-ups.
Role type
Senior IC PCB Layout Engineer
Builds
High-performance data center hardware and AI inference ASICs
Domain
Semiconductor hardware / AI infrastructure
Deliverable
production ML models | product features
Required skills
Cadence Allegro, high-speed signaling (100G), power distribution network design, HDI stack-up design, signal integrity analysis, impedance control, thermal management, BGA ball-map breakout
Preferred skills
Advanced degree in EE/Electronics, experience with complex HDI manufacturing processes
Technologies
Cadence Allegro
Responsibilities
Lead design of high-speed PCB layouts for 100G applications; Develop power distribution networks and thermal management solutions; Manage complex HDI PCB stack-ups with blind/buried vias; Collaborate with electrical and mechanical teams on system integration.
Seniority
Senior, hands-on IC