Principal AMS Verification Engineer
Core
Verification of analog and mixed-signal circuits, including full-chip simulation environments and device-level electrical rule checks for memory and storage solutions.
Role type
Principal AMS Verification Engineer
Builds
Full-chip mixed-signal simulation environments and verification plans for DRAM, NAND, and NOR memory products.
Domain
Semiconductor manufacturing, memory and storage solutions
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
MOS device physics (second-order effects), analog circuit design (CM, BGR, op-amp, regulators, ADC, DAC, charge pumps), shell/Perl/Python scripting, Virtuoso/HSPICE/XA/Cosim, HDLs (Verilog/SV, Verilog A/AMS), system-level debugging
Preferred skills
AI-assisted coding techniques, automation of design and analysis workflows
Technologies
Virtuoso, HSPICE, XA, Cosim, Verilog, SystemVerilog, Verilog-A, AMS
Responsibilities
Generate full-chip mixed-signal simulation environments; create schematic/behavioral models for simulation efficiency; perform device-level electrical rule checks (SOA, snapback, SFB); conduct static and dynamic simulations to identify leakage paths; execute SPF extraction, fanout, and coupling checks; run power cycling simulations (PL, Brown-out events); correlate analog subsystems, logic, and firmware algorithms in chip-level user mode simulations; design verification plans based on data sheet reviews; support Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing groups to optimize manufacturing functions.
Seniority
Principal, hands-on IC with system-level outlook
