Senior SoC Design Engineer
Hybrid
Core
Designing and integrating RTL subsystems and SoC logic for IoT, Automotive, and Infrastructure computing systems.
Role type
Senior SoC Design Engineer (RTL)
Builds
Sophisticated processing systems for IoT, Automotive, and Infrastructure
Domain
Semiconductor / SoC Design
Required skills
Verilog HDL, SoC development, static design checks (CDC, RDC, X-prop, lint), design specifications, Perl/Python scripting, synthesis, timing analysis, power management
Preferred skills
ARM-based designs, AMBA protocols (ACE-Lite, AXI), NoCs, PCIe subsystems, SystemVerilog
Responsibilities
Integrate IPs and develop logic for subsystems, review verification test plans and debug issues, evaluate system performance, propose refinements to IP teams, enhance design methodologies, manage project plans and schedules
Seniority
Senior, hands-on IC
