Advanced Packaging Metrology Engineering Manager
Core
Lead a team of engineers to develop advanced wafer processing and packaging solutions, drive technology enablement, and ensure manufacturing readiness for next-generation semiconductor packaging.
Role type
Senior IC Engineering Manager (Advanced Packaging Metrology)
Builds
Wafer-level assembly technologies and advanced packaging modules for Intel's strategic roadmap
Domain
Semiconductor manufacturing, advanced packaging, metrology
Required skills
Semiconductor wafer/assembly process development, process development methodology, project management, technology transfer, cross-functional collaboration, team leadership, performance management, strategic planning
Preferred skills
Metrology expertise, managerial experience, wafer-level assembly/packaging R&D, technical leadership in process development, Hybrid bonded interconnects (HBI), redistribution layer (RDL) packaging, ultra-fine pitch solder connections, program leadership from strategy to high-volume production
Technologies
Metrology tools, wafer-level assembly equipment, HBI, RDL, solder connections
Responsibilities
Lead and inspire a team to develop advanced wafer processing and packaging solutions; Drive technology enablement, feasibility studies, and module improvement initiatives; Ensure successful demonstrations of manufacturing capabilities and manage technology transfers; Partner with cross-functional teams to deliver process solutions; Collaborate with supplier executive management to implement innovative concepts; Execute long-term strategies for module engineering; Set team objectives and apply performance management; Coach and mentor engineers in skills growth and technology road mapping
Seniority
Senior, hands-on IC with management responsibilities
