Silicon Packaging Design Engineer
Core
End-to-end development of substrate designs from concept to tapeout for Intel's data center silicon packaging solutions.
Role type
Silicon Packaging Design Engineer
Builds
Substrate designs for data center technologies
Domain
Semiconductor / Data Center
Required skills
substrate design, physical layout and routing, design for manufacturability (DFM), design rule checking (DRC), cross-functional collaboration, problem-solving
Preferred skills
E-CAD tool proficiency
Technologies
E-CAD tools
Responsibilities
Drive complete substrate design development from concept to tapeout; perform physical layout and routing; conduct substrate fit and routing studies; collaborate with silicon and hardware teams to optimize performance and pinout configurations; define and implement substrate design rules; perform design reviews and resolve DRCs; integrate design documentation into product lifecycle management systems.
Seniority
Junior, entry-level IC
