Director, SoC Design Engineering
Core
Lead functional verification for cutting-edge system-on-chip (SoC) designs, defining scalable methodologies to ensure first-pass silicon success.
Role type
Director, SoC Design Engineering (Functional Verification)
Builds
Complex SoC designs integrating high-speed protocols (PCIe, DDR, AXI, CHI) and custom IPs for Intel products.
Domain
Semiconductor / SoC Design / Functional Verification
Deliverable
production ML models | product features
Required skills
SystemVerilog, UVM/OVM, SoC microarchitecture, high-speed protocols (PCIe, DDR, AXI, CHI), emulation platforms (Palladium, Veloce), formal verification, Python/Perl/TCL scripting
Preferred skills
Power intent verification (UPF), security verification, AI/ML accelerators, SmartNIC technologies, pre-silicon to post-silicon correlation
Technologies
Palladium, Veloce, FPGA, UVM, SystemVerilog, Python, Perl, TCL
Responsibilities
Architect end-to-end SoC verification strategies; Develop block, subsystem, and SoC-level verification plans; Lead verification closure for critical interfaces; Oversee IP integration (PCIe, DDR, Ethernet); Define reusable UVM methodologies; Lead emulation and performance modeling; Debug complex pre-silicon issues; Mentor technical leads and engineers.
Seniority
Director, strategic leadership with hands-on technical expertise
