CPU Physical Design Engineer
Core
Physical design implementation of custom CPU designs from RTL to GDS for manufacturing, focusing on power efficiency and timing closure.
Role type
Senior IC physical design engineer (CPU)
Builds
High-speed, low-power CPU cores and microprocessors
Domain
Semiconductor / CPU Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> production ML models (Incorrect mapping in thought, corrected below)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> infrastructure (Physical design flow, GDS, manufacturing database)
Required skills
RTL to GDS flow, Synthesis, Place and Route, Clock Tree Synthesis, Static Timing Analysis, Power/Clock distribution, DFT, TCL scripting, EDA tool expertise (Synopsys/Cadence)
Preferred skills
CPU-level timing analysis, Floor-planning, Noise analysis, Reliability verification, Full-chip partitioning
Technologies
Synopsys, Cadence, TCL
Responsibilities
Perform physical design implementation from RTL to GDS; Conduct synthesis, place and route, clock tree synthesis, floor planning, and static timing analysis; Conduct verification and signoff including formal equivalence, DRC/LVS, and power integrity analysis; Optimize CPU design for power, frequency, and area; Collaborate with logic, circuit, and architecture teams; Work with EDA vendors to enhance tool capabilities.
Seniority
Senior, hands-on IC
