Sr Engineer Design
Core
Design and verify custom System-on-Chip (SoC) designs, focusing on all aspects of Design-for-Test (DFT) including ATPG, MBIST, LBIST, and analog test solutions.
Role type
Senior SoC DFT Engineer
Builds
Custom SoC designs with integrated DFT architectures
Domain
Semiconductor manufacturing / Digital design / Test engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> production ML models (Incorrect mapping in thought, correcting to: production ML models is wrong, this is hardware. Correcting: physical/clinical work is wrong. This is hardware design. The options are: production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work. None fit perfectly. 'Infrastructure' is closest for backend flow, but 'product features' fits the chip design. Let's look at the options again. 'physical/clinical work' is for hardware. 'infrastructure' is for cloud. 'product features' is for software. This is a chip. I will map to 'product features' as the chip is the product, or 'infrastructure' if viewed as backend. Actually, the prompt says 'physical/clinical work' is an option. A chip is a physical object. I will use 'physical/clinical work' as the closest fit for hardware design among the limited choices, or 'product features'. Let's re-read the options. 'physical/clinical work' usually implies medical or heavy machinery. 'product features' implies software. 'infrastructure' implies cloud/ops. This is a semiconductor role. I will select 'product features' as the chip is the product being built, or 'infrastructure' for the backend flow. Given the context of 'design and verify', 'product features' is the most logical fit for the 'chip' as a product. Wait, the instruction says 'one of: ...'. I must pick one. I will pick 'product features' as the SoC is the product.
Required skills
ATPG, MBIST, LBIST, analog test solutions, digital design fundamentals, Verilog, SystemVerilog, scripting (Python, Tcl, Perl), test pattern generation, RTL integration, physical design collaboration, silicon bring-up analysis, root-cause debugging, DFT automation
Preferred skills
Git/version control, simulation log/waveform debugging, UNIX EDA environment
Technologies
Verilog, SystemVerilog, Python, Tcl, Perl, EDA tools
Responsibilities
Implement DFT architectures (ATPG, MBIST, LBIST, scan insertion, analog test), execute test pattern generation and optimization, apply standardized DFT methodologies, integrate DFT requirements into RTL and physical design, develop automation scripts for test pattern creation, analyze test data from silicon bring-up and production, document DFT implementations and test results
Seniority
Senior, hands-on IC
