Senior Staff Design Verification Engineer SOC
Core
Develop testbenches, testcases, and checkers to exercise and measure SoC design behavior against specifications; debug simulation discrepancies and improve verification flows.
Role type
Senior Staff IC Design Verification Engineer (SoC)
Builds
Verified SoC designs for semiconductor customers
Domain
Semiconductor / SoC Design Verification
Required skills
SystemVerilog, UVM, C, Python, Tcl/Tk, Perl, AXI, AHB, APB, SoC verification methodology, bug debugging, cross-functional collaboration
Preferred skills
RISC-V, ARM, MIPS architectures, IP-XACT, SystemRDL, UVM RAL, Functional Safety (ISO 26262), fault injection, UPF, gate-level simulation, formal verification
Technologies
SystemVerilog, UVM, Python, Tcl/Tk, Perl, AXI, AHB, APB, RISC-V, ARM, MIPS, IP-XACT, SystemRDL, ISO 26262, UPF
Responsibilities
Debug differences in simulated behavior of designs and design specifications; Contribute to the development of DV flows and methodology for improved development efficiency; Collaborate with cross-functional teams to resolve bugs (via careerplan.io/jobs/JR-2603089-senior-staff-design-verification-engineer-soc-at-globalfoundries)
Seniority
Senior Staff, hands-on IC with mentorship
