SoC Verification
Core
Develop functional verification test benches, components, and test cases for complex multi-million gate SoC/subsystem designs using UVM and SystemVerilog.
Role type
Senior IC SoC verification engineer
Builds
Verification environments and test cases for complex multi-million gate SoC/subsystem designs
Domain
Semiconductor hardware verification
Required skills
UVM, SystemVerilog, C, HDLs (Verilog/VHDL), RTL debugging, coverage-driven verification, regression management, ARM cores, interconnect protocols (AHB, AXI, ACE), bus protocols
Preferred skills
Memory controllers (Flash, SRAM, DDR3/4), PCIe, MIPI, GPU, VPU, Ethernet, USB, formal verification, low power intent verification (CPF, UPF)
Technologies
Synopsys, Cadence, Mentor, UVM, SystemVerilog, Verilog, VHDL, CPF, UPF
Responsibilities
Develop verification test bench components (drivers, monitors, checkers), create constrained-random stimulus, analyze RTL code and coverage results, debug failures and perform root cause analysis
Seniority
Senior, hands-on IC
