DFT Engineer
Core
Designing and deploying advanced Design-for-Test (DFT) solutions for semiconductor chip development, focusing on robust architectures and optimized test methodologies.
Role type
DFT Engineer
Builds
Semiconductor chips with integrated test architectures
Domain
Semiconductor / Hardware Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
ATPG, MBIST, LBIST, scan insertion, analog test solutions, EDA tools (Synopsys TestMAX, Cadence Modus, Mentor Tessent), scripting (Python, Perl, TCL), test pattern generation, fault coverage analysis, root-cause debugging
Preferred skills
automotive ASIL flows, high-volume manufacturing test challenges, process improvement, tool evaluation
Technologies
Synopsys TestMAX, Cadence Modus, Mentor Tessent, Python, Perl, TCL
Responsibilities
Implement DFT architectures including ATPG, MBIST, LBIST, and scan insertion; Execute test pattern generation and optimization; Integrate DFT requirements into RTL and physical design stages; Develop automation scripts for test pattern creation and analysis; Analyze test data from silicon bring-up and production to identify improvements; Document DFT implementations and test results
Seniority
Mid-Senior, hands-on IC
