Sr. Principal Engineer, Design Technologist
Core
Enable efficient silicon development by aligning design methodologies with foundry technologies to improve PPA (Power, Performance, Area) and ensure manufacturability for SoC designs.
Role type
Sr. Principal Engineer, Design Technologist
Builds
SoC designs optimized for advanced process nodes
Domain
Semiconductor manufacturing and SoC design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (SoC designs)
Required skills
Semiconductor process technology, SoC design, Physical Design, EDA flows/methodologies, Technology PDK, Timing analysis, Power optimization, Signal integrity, Design for Manufacturing (DFM), Yield optimization, EDA tool integration, Technology benchmarking, Roadmap planning, Mentorship
Preferred skills
Yield analysis, Silicon bring-up, Advanced packaging, Chiplet architecture
Technologies
Cadence, Synopsys, Siemens
Responsibilities
Translate process technology capabilities into design guidelines and methodology improvements; Drive technology benchmarking and define figure-of-merit analysis; Collaborate with architecture, RTL, and physical design teams to ensure process-aware design decisions; Develop and improve EDA flows for advanced process nodes; Drive innovation in design technology and address technology node gaps; Provide technical guidance and mentorship to junior engineers; Support customers and partners with design technology queries; Evaluate emerging trends and technologies including advanced packaging.
Seniority
Principal, hands-on IC with strategic leadership
