[MSL/SPD5] Senior/Staff Physical Design Engineer
Core
Implementing top-quality digital backend design for advanced process chips (6nm/4nm/3nm and below) from RTL to GDS, serving the semiconductor industry.
Role type
Senior/Staff Physical Design Engineer
Builds
Advanced process chips with billions of transistors for smartphones, mobile devices, home, and IoT devices.
Domain
Semiconductor / IC Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
RTL to GDS flow, block coordination, synthesis, APR, power verification, floorplanning, partitioning, hierarchical chip assembly, tapeout scheduling
Technologies
6nm, 4nm, 3nm, RTL, GDS, Synthesis, APR, PV
Responsibilities
Perform IC physical design for advanced process chips; act as block coordinator for synthesis/APR/PV tasks; serve as TOP role for complicated hierarchical chips; coordinate with Frontend and Signoff teams for on-time delivery and tapeout
Seniority
Senior/Staff, hands-on IC
