Platform Technology Development
Core
Develop systematic methodologies for chip design including FIP development, synthesis, DFT, physical implementation, and sign-off in advanced nodes or packages.
Role type
Senior IC physical design methodology engineer
Builds
Innovative HPC and Chiplet design methodologies
Domain
Semiconductor / Advanced Node Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
FIP development, synthesis, DFT, physical implementation, sign-off, process what-if assessment, system performance evaluation, circuit architecture exploration, EDA feature definition
Preferred skills
HPC design methodologies, Chiplet design methodologies, MTK product requirement alignment
Technologies
EDA tools, advanced node process technologies
Responsibilities
Develop systematic methodology to alleviate design challenges, work with foundry and EDA vendors to define innovative HPC and Chiplet design methodologies, explore new circuit architecture and EDA features to define improvement directions
Seniority
Senior, hands-on IC
