Sr. Staff Engineer PD
Core
Design and implement custom silicon solutions by executing physical design flows including synthesis, place-and-route, and verification to meet customer requirements.
Role type
Senior IC physical design engineer
Builds
Custom silicon ICs (SoCs)
Domain
Semiconductor / Hardware Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Physical design flows (synthesis, PNR, STA), EDA tools (Synopsys/Cadence), Timing closure, Power analysis, Scripting (TCL/Python/Perl), DFT implementation, Physical verification (DRC/LVS), IP reuse
Preferred skills
Custom silicon for automotive/HPC/AI, New tool adoption, Process improvement
Technologies
Synopsys ICC2/Fusion Compiler, Cadence Innovus/Genus, Mentor Calibre, PrimeTime/Tempus, TCL, Python, Perl
Responsibilities
Implement DFT architectures (ATPG, MBIST, LBIST, scan insertion), Execute physical design phases (floorplanning, placement, CTS, PNR, signoff), Resolve timing/congestion/power issues, Automate flows with scripting, Perform physical verification and debug support, Collaborate with RTL/verification/DFT/package teams
Seniority
Senior, hands-on IC
