Staff Verification Engineer - Media IP
Core
Staff Verification Engineer for DPU subsystems (Display Processors) within Arm Compute Subsystems, focusing on Image Signal Processors, Display Processors, and Video codecs for automotive, IoT, and client markets.
Role type
Staff IC verification engineer (DPU subsystems)
Builds
Reusable, scalable, high-performance SystemVerilog/UVM verification environments and verification IP for DPU subsystems
Domain
Semiconductor IP / Digital Design / Verification
Required skills
SystemVerilog, UVM, AMBA APB/AXI protocols, verification planning, testbench development, Python/C programming, regression automation (via careerplan.io/jobs/84401268624-staff-verification-engineer-media-ip-at-arm)
Preferred skills
Power-aware verification, formal verification, performance analysis, C reference models
Technologies
SystemVerilog, UVM, Python, C, AMBA APB, AMBA AXI
Responsibilities
Own and drive verification for DPU subsystems from planning to sign-off; Architect reusable verification environments; Define verification plans, coverage models, and sign-off criteria; Lead resolution of complex unit-level and system-level failures; Drive improvements in verification methodology and automation.
Seniority
Staff, hands-on IC with architectural influence
