Principal IP Verification Engineer
Core
Lead verification engineer responsible for establishing verification architecture, developing testbenches, and ensuring product quality for Arm's IP and SoC designs.
Role type
Principal IP Verification Engineer (Lead)
Builds
Functional verification strategies, test suites, and reconfigurable IP features for Enterprise, Auto, and Client markets.
Domain
Semiconductor / Hardware Verification / SoC Design
Required skills
Functional verification, Testbench development, Verification architecture, Test plan creation, Microarchitecture debugging, Reconfigurable IP design, Coverage analysis (Functional, Toggle, Code), Front-end verification tools (Questa, VCS, Jasper Gold, Verdi, UPF), Static/Dynamic simulation
Preferred skills
Object-oriented programming, ARM-based designs, OTP/Fuse usage, JTAG/TAP protocols, Perl/Python scripting, SoC system debug, DFT methodologies (RTL testability, scan insertion, OCC) (via careerplan.io/jobs/100083836896-principal-ip-verification-engineer-at-arm)
Technologies
Questa, VCS, Jasper Gold, Verdi, UPF, Perl, Python
Responsibilities
Establish and maintain verification architecture, Write and review test plans and define methodologies, Develop IP features for reconfigurable designs, Partner with design to review Microarchitectural specifications and debug issues, Lead a team of verification engineers, Ensure quality for each product release
Seniority
Principal, Lead IC
