Sr SOC Verification Engineer, Cloud-Scale Machine Learning Acceleration - Annapurna Labs
Core
Design and optimization of custom silicon for cloud-scale machine learning accelerators (Inferentia and Trainium SOCs) to power AI workloads in datacenters.
Role type
Senior IC design verification engineer (SOC level)
Builds
Next-generation cloud server chips for AWS datacenters
Domain
Semiconductor design verification / Cloud-scale AI infrastructure
Deliverable
production ML models | product features
Required skills
System Verilog, UVM, testbench development, stimulus generation, checkers, assertions, coverage analysis, bug triage, IP integration, C/C++, Python scripting, AMBA protocols (AHB/APB/AXI), interconnect protocols (PCIe, UCIe), memory subsystems (cache coherency, synchronization), CPU/GPU/ML accelerator verification
Preferred skills
Multi-level design verification (custom blocks, IP, sub-systems, fullchip SOC), multiple verification platforms, complex accelerator design verification
Technologies
System Verilog, UVM, Python, C/C++, PCIe, UCIe, AMBA
Responsibilities
Verify custom chip designs at the SOC level, Integrate 3rd party IPs and VIPs into the SOC testbench, Create comprehensive testplans and execute coverage plans, Maintain autosmoke and regression infrastructure, Dive deep into bugs and triage issues, Mentor junior engineers
Seniority
Senior, hands-on IC
