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Senior Chip Design Engineer , Graviton

Haifa, Haifa, Israel💼 Full-time🗓 2026-10-06 → 2026-10-07

Core

Technical lead for a major SoC domain across the full lifecycle from feature definition through tape-out and silicon bring-up, defining micro-architecture and driving RTL design.

Role type

Senior IC chip design engineer (SoC)

Builds

AWS Graviton processors and custom accelerators for cloud infrastructure

Domain

Semiconductor / Cloud Infrastructure

Deliverable

production ML models | product features

Required skills

SoC design, RTL design (Verilog/SystemVerilog), micro-architecture definition, IP integration, post-silicon debug, power/performance/area trade-offs

Preferred skills

M.Sc. in technical field, experience with PCIe/DDR/AXI/CHI/Ethernet protocols, hardware support for virtualization (hypervisors, IOMMU/SMMU), multiple tape-outs (via careerplan.io/jobs/10570609-senior-chip-design-engineer-graviton-at-amazon)

Technologies

Verilog, SystemVerilog, PCIe, DDR, AXI, CHI, Ethernet, Arm virtualization extensions

Responsibilities

Lead micro-architecture definition and own power, performance and area trade-offs; Drive RTL design in Verilog/SystemVerilog and lead design reviews; Define and execute IP integration strategies; Set verification priorities and lead system-level and post-silicon debug; Carry design learnings into next Graviton generations; Mentor and technically guide engineers in the domain

Seniority

Senior, hands-on IC