Lead Memory Systems Design Engineer
Core
Lead post-silicon system memory team delivering cutting-edge memory solutions for AMD's latest SOC's, focusing on enabling, debugging, and qualifying memory technologies.
Role type
Lead Memory Systems Design Engineer (Post-Silicon)
Builds
DDR/LPDDR/GDDR Memory interface IP for PCs, gaming, data center, AI, and embedded products
Domain
Semiconductor / High-Speed Memory Systems
Required skills
DRAM architecture, Memory controller design, PHY architecture, High-speed protocols, Signal integrity, Power integrity, System-level debug, Root cause analysis, Lab equipment operation, Scripting (Python/Perl/Ruby), Hardware/Software architecture knowledge
Preferred skills
GPU/APU debug experience, Motherboard integration, Oscilloscope/BERT/Logic analyzer usage, Windows/Linux OS proficiency
Technologies
LPDDR5x/6, DDR5, GDDR6/7, DDR/LPDDR/GDDR, PHY, PLL/DLL, ATE, BIOS, Ruby, Python, Perl
Responsibilities
Provide systems engineering and post-silicon support for DDR/LPDDR/GDDR Memory interface IP; Lead Pre-Silicon engagement preparing test plans and BIOS readiness; Lead new products bring-up support from first silicon through initial production; Drive cross-functional teams for feature enablement and optimization; Lead system-level debug and root cause analysis for HW/SW blocks; Support customer platform issues
Seniority
Lead, hands-on IC
