Staff Package Design Engineer
Core
Design advanced IC packages from concept through tape-out and production, ensuring electrical, mechanical, and thermal targets for high-speed interfaces.
Role type
Staff IC Package Design Engineer
Builds
Advanced semiconductor packages for next-gen products (LPDDR5X/6, PCIe, die-to-die links)
Domain
Semiconductor / IC Packaging
Required skills
Package substrate design, floorplanning, routing, stack-up definition, design rule validation, I/O planning, bump/ball assignment, signal integrity analysis, power integrity analysis, thermal analysis, DFX integration, substrate supplier interface, design automation scripting
Preferred skills
Advanced flip-chip/SiP/PoP/2.5D/3D packaging, high-speed interface experience, substrate design flows (Cadence APD/SIP, Allegro), manufacturing constraints knowledge, analysis tools (Ansys HFSS/SIwave/Q3D, Cadence Sigrity, Keysight ADS)
Technologies
Cadence APD/SIP, Allegro, Ansys HFSS, Ansys SIwave, Ansys Q3D, Cadence Sigrity, Keysight ADS, SKILL
Responsibilities
Execute package substrate design from concept to production release; Define package architecture based on electrical, thermal, and mechanical requirements; Optimize I/O planning and interface signal integrity; Conduct design feasibility studies and trade-off analysis; Drive DFX into the design process; Perform modeling extraction for SI/PI analysis; Collaborate with SI, PI, and thermal teams; Interface with substrate suppliers; Contribute to design automation and methodology development
Seniority
Staff, hands-on IC with mentorship
