DFT Engineer
Core
Design and verify Digital Test (DFT) features for next-gen processors to ensure high-quality, industry-leading technologies.
Role type
Senior IC DFT Engineer (Digital Design)
Builds
High-quality semiconductor processors and chips
Domain
Semiconductor / Digital IC Design
Required skills
Scan insertion, ATPG pattern generation, MBIST/BISR implementation, JTAG, Spyglass-DFT debug, gate-level simulation, test coverage analysis, scripting (TCL/AWK/SED)
Preferred skills
Scan-stitching concepts, Tessent ATPG flow, post-silicon bring-up, Mentor Tessent ATPG tools
Technologies
Spyglass-DFT, Tessent, TCL, AWK, SED, JTAG
Responsibilities
Implement and verify DFT features (SCAN, MBIST, LBIST, JTAG), support Spyglass-DFTDRC debug and coverage correlation, perform scan insertion and ATPG pattern generation, verify ATPG patterns with gate-level simulation, analyze test coverage and test cost reduction, provide post-silicon support for bring-up and yield learning
Seniority
Senior, hands-on IC
