DFx-DV Lead
Core
Lead Design for Test (DFT) and Design Verification (DV) for front-end silicon design to ensure first-pass silicon success and yield.
Role type
Senior IC silicon design engineer (DFT/DV)
Builds
Next-gen Radeon GPUs and AI processors
Domain
Semiconductor / Hardware Design
Required skills
DFT architecture implementation, ATPG pattern generation, gate-level simulation, test coverage analysis, Verilog RTL design, Perl/Shell scripting
Preferred skills
IEEE1500, JTAG 1149.x, Scan, memory BIST, Mentor testkompress, Synopsys Tetramax/DFTMAX, VCS simulation tool
Technologies
Verilog, Perl, Shell, VCS, Mentor testkompress, Synopsys Tetramax, Synopsys DFTMAX
Responsibilities
Implement and verify DFT architecture and features, Perform scan insertion and ATPG pattern generation, Verify ATPG patterns with gate-level simulation, Analyze test coverage and test cost reduction, Provide post-silicon support for bring-up and yield learning
Seniority
Senior, hands-on IC
