DFT Architect
Core
Define DFT architecture for Scan, MBIST, PHY, high-speed IOs, and FPGA logics to ensure manufacturability and yield for future AMD products.
Role type
Senior IC DFT Architect
Builds
Next-generation semiconductor processors and chips
Domain
Semiconductor / Hardware Design
Required skills
DFT architecture definition, Scan/Scan Compression, MBIST, ATPG, Verilog, synthesis, STA, physical implementation, verification methodology, FPGA logic, firmware methodology, post-silicon debug
Preferred skills
Tessent Streaming Scan Network (SSN), high-speed IO design, digital communication controllers, oscilloscope/logic analyzer usage
Technologies
Verilog, ATPG, Tessent, FPGA, ATE
Responsibilities
Drive DFT architecture definitions and specifications for future products; Manage DFT activities across architecture, design, verification, and test implementation; Collaborate with design and physical design teams to ensure correct DFT structure implementation; Drive internal DFT teams to create test solutions; Plan for diagnosability and yield improvement.
Seniority
Senior, hands-on IC
