CareerPlan

Distinguished Signal and Power Integrity Engineer

US, CA, Santa ClaraFull-time$320k2026-11-06 → 2026-11-10

Core

Lead corporate-level strategies and technical direction for high-speed signaling technologies across advanced semiconductor packaging, sockets, and connectors for next-gen AI and HPC platforms.

Role type

Distinguished Signal and Power Integrity Engineer (Strategy & Architecture)

Builds

State-of-the-art interconnect and packaging solutions (UCIe, HBM, DDR, PCIe, SerDes 224G/448G), co-packaged optics, stacked die, and chiplet-based architectures.

Domain

Semiconductor / High-Speed Signaling / Advanced Packaging

Required skills

High-speed signal integrity, computational electromagnetics, semiconductor assembly technologies, EMIB, UCIe, CPO, high density connectors, modeling and characterization flows, design for high volume manufacturing

Preferred skills

Bringing advanced SI concepts from research to product, pioneering industry standards, deep knowledge of package substrate, PCB, cables and manufacturing challenges

Responsibilities

Lead development of corporate-level strategies for high-speed signaling technologies, oversee technical direction for next-gen products, architect interconnect and packaging solutions, enable advanced packaging technology solutions, develop modeling and characterization flows, offer strategic counsel to senior leadership

Seniority

Distinguished, Strategy & Mentorship