ASIC Physical Design Engineer - New College Grad 2027
Core
ASIC Physical Design Engineer responsible for the stage from RTL frozen to tape out, including synthesis, formal verification, constraints definition, and timing closure.
Role type
ASIC Physical Design Engineer
Builds
Digital chips (GPUs/AI accelerators)
Domain
Semiconductor / VLSI Design
Deliverable
production ML models
Required skills
RTL design, Synthesis, Formal Verification, Timing closure, Floorplanning, Netlist generation, EDA tool usage (Synopsys/Cadence), Python/TCL scripting
Preferred skills
Advanced process node experience, Flow automation development, Methodology development
Technologies
Synopsys DC/PT/Formality, Cadence RC Compiler/LEC, Python, TCL
