CareerPlan

Senior System Integration Engineer, Memory

US, CA, Santa ClaraFull-time$196k2026-09-23 → 2026-11-10
Hybrid

Core

Senior Memory Systems Engineer owning HBM and LPDDR integration in sophisticated SoCs, resolving system-level memory challenges across silicon, package, embedded software, and testing.

Role type

Senior IC memory systems engineer (silicon bringup & characterization)

Builds

Next-generation SoCs with high-performance memory subsystems

Domain

Semiconductor / High-speed memory systems

Deliverable

production ML models

Required skills

HBM/LPDDR system integration, silicon bringup, characterization, debug, SI/PI, timing, margining, memory training, thermal management, power management, firmware integration

Preferred skills

PHY controller development, HBM3/HBM3E specifics, JEDEC margins, thermal-electrical co-sim, ECC methodology, test automation, LLM-assisted root cause analysis

Technologies

HBM, LPDDR, SoC, SI/PI, VF shmoo, eye diagrams, LLM tools

Responsibilities

Drive HBM and LPDDR system integration, bringup, characterization, and debug; Own memory performance, power, thermal, and reliability closure; Lead post-silicon margining, VF shmoo, and correlation work; Debug memory training, calibration, and stability issues; Define validation and characterization planning

Seniority

Senior, hands-on IC