Senior Mixed Signal Design Engineer
Core
Architect and implement high-speed Serdes architectures reaching 80Gbps and beyond for next-generation connectivity products.
Role type
Senior IC mixed-signal design engineer (analog/RF)
Builds
High-performance silicon chips for computer graphics, PC gaming, and accelerated computing
Domain
Semiconductor / Analog IC design
Required skills
Analog circuit design, Serdes architecture, FinFET technology, deep-submicron CMOS, Cadence Virtuoso, Spectre, HSpice, FineSim, XA, noise analysis, Monte Carlo simulations, loop stability, analog/digital circuit modeling
Preferred skills
Silicon ownership, post-silicon bring-up and debugging, high-speed data/clock path design, floorplanning, high-speed routing
Technologies
Cadence Virtuoso, Spectre, HSpice, FineSim, XA
Responsibilities
Drive the full lifecycle from concept and schematic entry to layout, verification, and final silicon characterization; Optimize complex circuits for peak system performance balancing noise, power, and loop stability; Partner with layout engineers for strategic floorplanning and high-speed routing mentorship; Lead post-silicon bring-up and debugging efforts
Seniority
Senior, hands-on IC
