Senior Verification Engineer, Memory Subsystem
Core
Verify ASIC design, architecture, and micro-architecture for the GPU memory subsystem unit using advanced verification methodologies.
Role type
Senior IC verification engineer (memory subsystem)
Builds
GPU memory subsystem units
Domain
Semiconductor / Hardware Verification
Required skills
Verilog, SystemVerilog, UVM/VMM, functional coverage driven verification, assertion-based verification, random stimulus generation, deadlock verification, performance verification, bus functional modeling, test plan development
Preferred skills
Memory subsystem or network interconnect IP verification, Python/Perl/shell scripting, debugging and analytical skills
Technologies
Verilog, SystemVerilog, UVM, VMM, simulation and debug tools
Responsibilities
Define verification scope and develop verification infrastructure; create test plans and tests for complex IPs/sub-systems; perform functional coverage closure; collaborate with architects, designers, and pre/post silicon teams
Seniority
Senior, hands-on IC
