DFT Engineer
Core
Ensuring quality of next-generation EPYC Server SoCs through structural DFT, ATPG, and LBIST techniques.
Role type
Senior IC silicon design engineer (DFT)
Builds
Next-generation EPYC Server SoCs
Domain
Semiconductor / High-performance computing
Required skills
DFT architecture and design, ATPG tools (Mentor TK), static timing analysis, timing closure, hands-on debug, scripting
Technologies
Mentor TK
Responsibilities
Collaborate with Architecture teams on DFT implementation; Interface with Design teams to ensure DFT design rules; Work with PD teams for timing closure; Generate manufacturing test patterns; Simulate and verify ATPG/LBIST patterns; Analyze stakeholder feedback for design changes; Support Silicon bring-up and debugs; Develop and maintain scripts
Seniority
Senior, hands-on IC
