DFT Engineer
Core
Design and verify Design for Test (DFT) and Design for Debug (DFD) solutions for complex, high-performance System-on-Chips (SoCs) to enable efficient silicon validation and debug.
Role type
SoC DFX Engineer (DFT/DFD)
Builds
DFX logic and verification infrastructure for advanced processor designs
Domain
Semiconductor / SoC Design / Hardware Verification
Required skills
DFT/DFD architecture, JTAG, LBIST, MBIST, Scan, ATPG, Tessent tools, ATE bring-up, post-silicon bring-up, IP-level/ASIC verification, Verilog, SystemVerilog, SystemC, C++, UVM, static timing analysis, Perl, Ruby, Makefile, shell scripting
Preferred skills
Leadership or mentorship experience
Technologies
Tessent, UVM, SystemVerilog, Verilog, SystemC, C++, Perl, Ruby, Makefile, shell
Responsibilities
Collaborate with architects and firmware engineers to define DFX features; Design and integrate DFX logic in complex SoCs; Build test plan documentation; Estimate test writing time and environment changes; Build directed and random verification tests; Debug test failures and resolve design defects; Review functional and code coverage metrics to modify tests.
Seniority
Mid-Senior, hands-on IC
