Senior Verification Engineer
Core
Developing fully verified IP, Subsystem, and System environments for advanced Digital Signal Processing (DSP) ASIC solutions for next-generation wireless communication systems.
Role type
Senior IC verification engineer (VLSI)
Builds
Verified IP, Subsystem, and System environments for 5G base stations, private networks, and LEO satellite platforms
Domain
Semiconductor / VLSI / Wireless Communication
Required skills
SystemVerilog-UVM, Specman, System C, C++, DSP knowledge, 5G protocols, verification flow development, test plan creation, functional coverage planning
Preferred skills
vplan/vmanager usage, formal verification, emulation
Technologies
UVM, SystemVerilog, Specman, System C, C++, vplan, vmanager
Responsibilities
Develop full verification flow from architecture definition to presentation; create verification strategy, micro architecture, test plan, and functional coverage plan; work on state-of-the-art verification environments and tools
Seniority
Senior, hands-on IC
