Staff Mask Design Engineer
Core
Deliver robust, high-quality physical layouts for complex analog and mixed-signal ICs for automotive applications, ensuring manufacturability, reliability, and on-time delivery.
Role type
Staff IC Mask Design Engineer (Analog/Mixed-Signal)
Builds
Physical layouts for Automotive Business Line products at IP, block, and Chip Top level
Domain
Semiconductor / Analog and Mixed-Signal IC Design
Required skills
Analog layout techniques, Floorplanning, Device matching, Parasitic management, Latch-up prevention, ESD protection, DRC/LVS/ERC/DFM flows, Mixed-Signal-on-Top (MSoT) methodologies, Advanced CMOS BCD technologies (via careerplan.io/jobs/744000153194549-staff-mask-design-engineer-at-renesas-electronics)
Preferred skills
Automotive or safety-critical semiconductor product experience
Technologies
Cadence Virtuoso / Virtuoso XL, Mentor Graphics Calibre, R3D
Responsibilities
Implement physical layouts at IP, block, and Chip Top level; Drive floorplanning activities; Define power supply strategy and signal distribution; Apply state-of-the-art techniques for yield optimization and reliability; Execute physical verification flows (DRC, LVS, ERC, DFM, PEX); Lead layout team activities including task planning and knowledge sharing; Collaborate with design, verification, and technology teams to resolve implementation issues.
Seniority
Staff, hands-on IC design with team leadership