Senior Digital Verification Engineer
Core
Design and develop scalable, reusable verification environments for complex Mixed-Signal and System-on-Chip (SoC) ASICs to ensure product quality and accelerate first silicon bring-up.
Role type
Senior Digital Verification Engineer (ASIC/SoC)
Builds
Consumer and automotive integrated circuits
Domain
Semiconductor / Mixed-Signal SoC Design
Deliverable
production ML models | product features
Required skills
UVM, formal verification, directed verification, Mixed-Signal/SoC verification, EDA tools, simulation/debugging, Python/Tcl scripting, UPF, analog/mixed-signal modeling (wreal, MATLAB/Simulink, SystemC)
Preferred skills
AI-assisted engineering workflows
Responsibilities
Design verification environments for complex ICs, apply functional and formal verification methodologies, collaborate in global engineering networks, participate in full product lifecycle from concept to qualification, document and improve verification processes
Seniority
Senior, hands-on IC
