Senior Staff Mixed Signal Verification Engineer
Core
Lead chip-level verification and behavioral modeling of mixed-signal power management devices including PMICs, battery chargers, and switching regulators.
Role type
Senior Staff Mixed Signal Verification Engineer
Builds
Complex mixed-signal power chips for Automotive, Industrial, Infrastructure, and IoT applications
Domain
Semiconductor / Power Management ICs
Deliverable
production ML models | product features
Required skills
Mixed-signal verification, AMS/DMS simulation, behavioral modeling, SystemVerilog, Verilog-AMS, UVM, Cadence Xcelium, Spectre, coverage closure, root-cause analysis
Preferred skills
Experience with switching regulators, battery chargers, PMICs, analog-digital interface debugging, silicon validation
Technologies
SystemVerilog, Verilog-AMS, UVM, Cadence Xcelium, Spectre
Responsibilities
Lead chip-level verification of analog and mixed-signal circuits; Create and validate behavioral models; Develop verification plans with traceability; Debug mixed-signal verification issues; Collaborate with design and CAD teams; Interface with external customers
Seniority
Senior Staff, hands-on IC with technical leadership
