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Director, Package Design Engineering

San Jose, CA, us💼 Full-time💰 $230,000–$260,000🗓 2026-08-13 → 2026-09-26

Core

Lead package technology development, NPI, and global OSAT management for AI/Datacenter power packaging solutions.

Role type

Director, Package Design Engineering

Builds

Smart Power Stages, Vertical Power Stages, Power Modules, and Discrete FET packages using WBG (SiC & GaN) and advanced interconnects.

Domain

Semiconductor manufacturing, Power Electronics, Wafer Level Packaging

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Power SiP/module design, Wafer level packaging, Flip-chip interconnects, OSAT/CM management, DOE optimization, Process qualification, SPC, Statistical analysis

Preferred skills

Wire-bonding, Multi-chip module technologies, DBC/AMB substrates knowledge

Technologies

SiC, GaN, DBC, AMB, Flip-chip, Multi-chip module

Responsibilities

Define technology roadmap and manage R&D budget; Benchmark and qualify materials, processes, and subcontractors; Optimize assembly processes via DOE; Resolve process integration issues; Establish production controls and quality monitors; Manage transition to production and ramp-up; Address customer complaints with cross-functional teams; Maintain package design rules.

Seniority

Director, Strategy & Execution

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