Staff Package Design Engineer - Substrate 封装设计专家（基板方向）
Core
Design and develop package and interconnect methods for power SiP/modules, wafer level chip scale package, flip-chip, multi-chip module LGA, and power device packaging.
Role type
Staff Package Design Engineer (Substrate/Embedded)
Builds
Power SiP modules, wafer level packages, flip-chip interconnects, and multi-chip modules for automotive, industrial, and consumer applications.
Domain
Semiconductor packaging and interconnect technologies
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Embedded substrate development, FET die & IC driver & capacitor integration, package technology qualification, OSAT/CM management, DOE execution, process integration, SPC and statistical analysis, Cu FSM/BGBM technologies
Preferred skills
Advanced knowledge of power SiP innovations, roadmap development execution, customer complaint resolution
Technologies
Cu FSM, BGBM, SPC software
Responsibilities
Design and develop package and interconnect methods; Benchmark, select and qualify materials, processes and assembly subcontractors; Work with OSAT/CM to develop, run DOE to optimize processes; Resolve process integration issues; Establish production controls and monitor quality; Ensure smooth transition into production; Develop and maintain technical expertise on advances in packaging; Participate in packaging roadmap development; Address internal and external customer complains; Establish & maintain package design rules.
Seniority
Staff, hands-on IC with strategic oversight
